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 ILX555K
10680 pixel x 3 line CCD Linear Sensor (Color)
Description The ILX555K is a reduction type CCD linear sensor developed for color image scanner. This sensor reads A4-size documents at a density of 1200DPI. Features * Number of effective pixels: 32040 pixels (10680 pixels x 3) * Pixel size: 3.5m x 3.5m (3.5m pitch) * Distance between line: 28m (8 lines) * Single-sided readout * Ultra low lag * Single 12V power supply * Maximum data rate: 5MHz/Color * Input Clock Pulse: CMOS 5V drive * Number of output 3 (R, G, B) * Package: 22 pin Plastic DIP (400mil) Absolute Maximum Ratings * Supply voltage VDD * Operating temperature Pin Configuration (Top View) 22 pin DIP (Plastic)
Block Diagram
14 ROG-G ROG-R ROG-B Driver
D74 D75
8
Driver
15 -10 to +55
V C
GND
D74 D75
20
Driver
9
CCD register
CCD register
1
1
GND VOUT-G VDD 2 ROG-R ROG-B
4 5
G R B
19 GND
Output amplifier Output amplifier Output amplifier GND
18 VOUT-B 17 VOUT-R
19
6 7 8 9
VOUT-R 17
16 NC 15 1 14 ROG-G
10680 10680 10680
NC 10 NC 11
13 NC 12 NC
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E01114A18-PS
VOUT-G
VOUT-B 18
5
GND
4
VDD
6
RS
RS
3
20 GND
3
D18 D19
D18 D19
D18 D19
1
2
1
1
2
21 2
21
2
D69 S1
D69 S1
D69 S1
NC
1
22 NC
CCD register
Read out gate
Read out gate
Read out gate
Green
Blue
Red
15
1
2
S10680 D70
S10680 D70
D74 D75
7
S10680 D70
ILX555K
Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 Symbol NC 1 RS GND VOUT-G VDD 2 ROG-R ROG-B NC NC NC Clock pulse input Clock pulse input GND Signal output (green) 12V power supply Clock pulse input Clock pulse input Clock pulse input NC NC Description Pin No. 12 13 14 15 16 17 18 19 20 21 22 Symbol NC NC ROG-G 1 NC VOUT-R VOUT-B GND GND 2 NC NC NC Clock pulse input Clock pulse input NC Signal output (red) Signal output (blue) GND GND Clock pulse input NC Description
Recommended Supply Voltage Item VDD Min. 11.4 Typ. 12.0 Max. 12.6 Unit V
Clock Characteristics Item Input capacity of 1, 2 Input capacity of RS Input capacity of ROG Symbol C1, C2 CRS CROG Min. -- -- -- Typ. 1200 10 10 Max. -- -- -- Unit pF pF pF
Clock Frequency Item 1, 2, RS Symbol f1, f2, fRS Min. -- Typ. 1 Max. 5 Unit MHz
Input Clock Pulse Voltage Condition Item 1, 2, RS, ROG pulse voltage High level Low level Min. 4.75 -- Typ. 5.0 0 Max. 5.25 0.1 Unit V V
-2-
ILX555K
Electrooptical Characteristics (Note 1) (Ta = 25C, VDD = 12V, fRS = 1MHz, Input clock = 5Vp-p, Light source = 3200K, IR cut filter CM-500S (t = 1.0mm)) Item Red Sensitivity Sensitivity nonuniformity Saturation output voltage Red Saturation exposure Dark voltage average Dark signal nonuniformity Image lag Supply current Total transfer efficiency Output impedance Offset level Green Blue Green Blue Symbol RR RG RB PRNU VSAT SER SEG SEB VDRK DSNU IL IVDD TTE ZO VOS Min. 0.98 0.98 0.85 -- 1.5 0.74 0.74 0.86 -- -- -- -- 92 -- -- Typ. 1.5 1.5 1.3 4 1.8 1.20 1.20 1.38 2 4 0.02 30 98 360 4.7 Max. 2.02 2.02 1.75 20 -- -- -- -- 5 12 -- 50 -- -- -- mV mV % mA % V Note 8 Note 6 Note 7 lx * s Note 5 % V Note 3 Note 4 V/(lx * s) Note 2 Unit Remarks
Notes) 1. In accordance with the given electrooptical characteristics, the black level is defined as the average value of D18, D19 to D67. 2. For the sensitivity test light is applied with a uniform intensity of illumination. 3. PRNU is defined as indicated below. Ray incidence conditions are the same as for Note 2. VOUT = 500mV (Typ.) PRNU = (VMAX - VMIN)/2 VAVE x 100 [%]
4. Use below the minimum value of the saturation output voltage. 5. Saturation exposure is defined as follows. SE = VSAT R
Where R indicates RR, RG, RB, and SE indicates SER, SEG, SEB. 6. Optical signal accumulated time int stands at 5.5ms. 7. VOUT-G = 500mV (Typ.) 8. Vos is defined as indicated bellow. VOUT VOUT indicates VOUT-R, VOUT-G and VOUT-B.
VOS GND
-3-
Clock Timing Chart 1
ROG
5 0
1
5 0
2
5 0
RS
5 0
S10678
S10679
S10680
D17
D18
D19
D67
D68
D69
D70
D71
D74
10755
Optical black (50 pixels) 1-line output period (10755 pixels)
1
2
3
4
VOUT
Dummy signal (69 pixels)
Note) The transfer pulses (1, 2) must have more than 10755 cycles. VOUT indicates VOUT-R, VOUT-G, VOUT-B. ROG indicates ROG-R, ROG-G, ROG-B.
D75
D1
D2
D3
S1
S2
-4-
ILX555K
ILX555K
Clock Timing Chart 2
t4 t5
ROG t6
t2 t7
1
t1
t3
2
Clock Timing Chart 3
t7 1 t6
2 t9 RS t10
t8 t11 t12
VOUT
-5-
ILX555K
Clock Pulse Recommended Timing Item ROG, 1 pulse timing ROG pulse high level period ROG, 1 pulse timing ROG pulse rise time ROG pulse fall time 1 pulse rise time/2 pulse fall time 1 pulse fall time/2 pulse rise time RS pulse high level period RS pulse rise time RS pulse fall time Signal output delay time Symbol t1 t2 t3 t4 t5 t6 t7 t8 t9 t10 t11 t12 Min. 50 3 1 0 0 0 0 30 0 0 -- -- Typ. 100 5 2 5 5 20 20 501 20 20 40 20 Max. -- -- -- -- -- -- -- -- -- -- -- -- Unit ns s s ns ns ns ns ns ns ns ns ns
1 These timing is the recommended condition under fRS = 1MHz.
-6-
Application Circuit
2
5.1k VOUT-B
5.1k VOUT-R
1
ROG-G
IC1
IC1
Tr1
2
Tr1
100
100
2
100
22
NC
21
2
20
GND
19
GND
18
VOUT-B
17
VOUT-R
16
NC
15
1
14
ROG-G
13
NC
12
NC
ROG-R
ROG-B
VOUT-G
GND
RS
VDD
NC
NC
12V
1
2
3
4
5
6
7
8
9
10
11
0.1F
47F/16V
2 IC1 1
100
100 Tr1 VOUT-G 5.1k
2
100
100 IC1
RS
2
ROG-R
ROG-B
IC1: 74AC04 Tr1: 2SC2785
Data rate fRS = 1MHz
NC
1
2
-7-
ILX555K
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
ILX555K
Example of Representative Characteristics (VDD = 12V, Ta = 25C)
Spectral sensitivity characteristics (Standard characteristics)
1.0
0.8
Relative sensitivity
0.6
0.4
0.2
0 400
450
500
550 600 Wavelength [nm]
650
700
Dark voltage rate vs. Ambient temperature (Standard characteristics)
100 10
Output voltage rate vs. Integration time (Standard characteristics)
10
Output voltage rate 0 10 20 30 40 50 Ta - Ambient temperature [C] 60
Dark voltage rate
1
1
0.1 -10
0.1 1 5 int - Integration time [ms] 10
Offset level vs. Supply voltage (Standard characteristics)
10 Ta = 25C 8 Vos - Offset level [V] Vos - Offset level [V] 8 10
Offset level vs. Ambient temperature (Standard characteristics)
6
6
4 Vos 0.7 VDD 2
4 Vos 3mV/C Ta 2
0 11.4
12 VDD - Supply voltage [V]
12.6
0 -10
0
10 20 30 40 50 Ta - Ambient temperature [C]
60
-8-
ILX555K
Notes of Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges. 2) Notes on Handling CCD Packages The following points should be observed when handling and installing packages. a) Remain within the following limits when applying static load to the package: (1) Compressive strength: 39N/surface (Do not apply load more than 0.7mm inside the outer perimeter of the glass portion.) (2) Shearing strength: 29N/surface (3) Tensile strength: 29N/surface (4) Torsional strength: 0.9Nm
Cover glass Plastic portion 39N 29N 29N 0.9Nm
Ceramic portion
(1)
Adhesive
(2)
(3)
(4)
b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for installation, either use an elastic load, such as a spring plate, or an adhesive. c) Be aware that any of the following can cause the package to crack or dust to be generated. (1) Applying repetitive bending stress to the external leads. (2) Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating. (4) Prying the plastic portion and ceramic portion away at a support point of the adhesive layer. (5) Applying the metal a crash or a rub against the plastic portion. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 30W soldering iron and solder each pin in less then 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. -9-
ILX555K
4) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 5) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to mechanical shocks.
- 10 -
Package Outline
Unit: mm
22 pin DIP (400mil)
55.7 0.3 10.2 0.3 22 37.38 (3.5m x 10680Pixels) 12
0 to 9 10.0 0.3 10.16
5.0 0.3
V H No.1 Pixel (Green) 11
1 4.95 0.6
4.0 0.5
3.58
2.54
0.51 0.3
M
1. The height from the bottom to the sensor surface is 2.38 0.3mm. 2. The thickness of the cover glass is 0.7mm, and the refractive in 1.5. PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL
Sony Corporation
Plastic, Ceramic GOLD PLATING 42 ALLOY 5.43g LS-B30(E)
ILX555K
PACKAGE MASS DRAWING NUMBER
4.28 0.5
0.25
- 11 -


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